Memory access controller

  • Inventors: KADAIRA GIZOU
  • Assignees: Nec Corp
  • Publication Date: June 01, 1988
  • Publication Number: JP-S63129464-A

Abstract

PURPOSE:To accelerate consecutive access, by accessing a second data adversely from a final element unless duplication is detected by a second detecting means even when the duplication is detected by a first detecting means. CONSTITUTION:A first duplication detecting means (comparator 11) detects that a memory unit to which the second data accesses is overlapped on the memory unit being in an active state in the access of a first data at the time of starting the access of the second data, from the memory unit address information of the forefront element of the second data, arranging direction information and the number of elements, the cycle time information of the memory unit, and the number of the memory units. Also, a second duplication detecting means (comparator 12), when the duplication being detected, inverts the access direction of the second data, and when the access is started from the final element adversely, detects that the duplication on the memory unit in the active state in the first data is generated. And an access control circuit 13 is operated so as to access the second data by accessing from the final element adversely unless the duplication is detected in the second detecting means 12 even when it is detected in the first detecting means 11.

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