PURPOSE: To implement high density integration, by forming an opening part striding an embedded type element isolating region in a mask material for etching a substrate, and forming a groove for a groove type MOS capacitor by etching the substrate.
CONSTITUTION: After a thermal oxide film 32 and an Si 3 N 4 film 34 are formed on an Si substrate 31, an opening part 34 for forming a groove is provided. The substrate 31 is etched, and a groove 35 for an embedded type element isolating region is formed. Then, an SiO 2 film 36 is grown on the entire surface. The film 34 is removed, and a protruding embedded type element isolating region is formed. After an Si 3 N 4 film 37 is grown, resist 38 is applied. A window 39 is provided so as to cover the isolating region. The films 37 and 32 are etched, and an opening part 40 is formed. After the resist 38 is removed, a groove 41 for an MOS capacitor is formed, with the film 37, a side wall 37a and the film 36 as masks.